Title: Toward Synchronized and Intelligent Digital Twin Construction for Complex Industrial IoT Systems
Abstract: Accurate and efficient digital twin construction is vital for managing complex Industrial Internet of Things (IIoT) systems, where real-time multi-attribute sensing and remote analytics are key enablers. However, challenges arise from the unsynchronized nature of distributed sensors and their heterogeneous sampling rates, leading to time misalignments that degrade correlation analysis and digital twin accuracy. Furthermore, application-agnostic digital twin solutions often impose significant communication and computational burdens. This talk addresses these challenges by examining the limitations of conventional network synchronization approaches in large-scale, time-sensitive IoT deployments. A novel, digital-twin-assisted model-based synchronization strategy is then introduced, which intelligently adapts clock alignment to minimize synchronization resource consumption in dynamic environments. Based on this, an integrated framework for end-to-end time synchronization and multi-attribute data resampling is presented, enabling efficient and precise digital twin generation. The talk concludes with a case study: a hierarchical, problem-driven digital twin architecture tailored for 6G network modeling and orchestration. This layered design highlights the potential of problem-oriented, resource-efficient twin construction for next-generation IIoT applications.
Biography 🔗
Xianbin Wang (Fellow, IEEE), received his Ph.D. degree in electrical and computer engineering from the National University of Singapore in 2001.
He has been with Western University, Canada, since 2008, where he currently serves as a Distinguished University Professor and a Tier-1 Canada Research Chair in Trusted Communications and Computing. Prior to joining Western University, he was with the Communications Research Centre Canada as a Research Scientist and later a Senior Research Scientist from 2002 to 2007. From 2001 to 2002, he was a System Designer at STMicroelectronics. His current research interests include 5G/6G technologies, Internet of Things, machine learning, communications security, digital twin, and intelligent communications. He has over 600 highly cited journals and conference papers, in addition to over 30 granted and pending patents and several standard contributions.
Dr. Wang is a Fellow of the Canadian Academy of Engineering and a Fellow of the Engineering Institute of Canada. He has received many prestigious awards and recognitions, including the IEEE Canada R. A. Fessenden Award, Canada Research Chair, Engineering Research Excellence Award at Western University, Canadian Federal Government Public Service Award, Ontario Early Researcher Award, and ten Best Paper Awards. He is currently a member of the Senate, Senate Committee on Academic Policy and Senate Committee on University Planning at Western. He also serves on NSERC Discovery Grant Review Panel for Computer Science. He has been involved in many flagship conferences, including IEEE GLOBECOM, ICC, VTC, PIMRC, WCNC, CCECE, and ICNC, in different roles, such as General Chair, TPC Chair, Symposium Chair, Tutorial Instructor, Track Chair, Session Chair, and Keynote Speaker. He serves/has served as the Editor-in-Chief, Associate Editor-in-Chief, Area Editor, and editor/associate editor for over ten journals. He was the Chair of the IEEE ComSoc Signal Processing and Computing for Communications (SPCC) Technical Committee and is currently serving as the Central Area Chair of IEEE Canada.